ASA 127th Meeting M.I.T. 1994 June 6-10

3aSP5. Progress in the development of speech processors for cochlear prostheses.

Blake S. Wilson

Neurosci. Prog. Res. Triangle Inst., Res. Triangle Park, NC 27709

Div. of Otolaryngol., Duke Univ. Med. Ctr., Durham, NC 27710

New strategies for representing acoustic information with multichannel cochlear implants have produced substantial improvements in speech recognition scores for implant users. One of those strategies, continuous interleaved sampling (CIS), presents brief pulses in a nonoverlapping sequence across electrode channels, with the pulse amplitudes for each channel reflecting the envelope of a corresponding frequency band of the acoustic input. Recent studies with CIS and related processing strategies will be described, including (a) within-subject comparisons of CIS with the compressed analog (CA) processor used in a standard clinical device, (b) parametric and control studies with CIS processors, and (c) a preliminary evaluation of a related strategy, virtual channel interleaved sampling (VCIS). VCIS processors add to the single-electrode channels of CIS processors virtual channels, produced by simultaneous stimulation of two or more electrodes and eliciting pitch percepts that are distinct from those of single-electrode channels. In general, the CIS/CA comparisons show higher levels of open-set speech recognition with CIS for each of 11 subjects. Results from the additional studies with CIS processors show how choices of pulse duration, pulse rate, and channel update order affect performance. Initial CIS/VCIS comparisons with three subjects do not show an immediate improvement in speech recognition scores with VCIS. [Work supported by NIH.]